1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to providing support for multiple coherent copies of a variable when mapping a computer program to a data processing apparatus.
2. Description of the Prior Art
Low power, high performance data processing systems increasingly use asymmetric multiprocessing (AMP) and private memories, lack memory coherence and contain fixed function and/or programmable accelerators. Such systems can provide an advantageous combination of high performance and low cost with low power consumption. However, such systems are complex architecturally and there are a great variety of ways in which such systems may be formed. This causes problems for programmers of such systems. A programmer of such systems may have to port a given application to a variety of systems which differ in architecture in a manner which requires significant alternations in the program and the way in which a program operates. Such programming is time consuming, expensive and error prone.
Furthermore, in a distributed memory system mechanisms need to be in place to manage the coherency of the variables stored in each memory and to ensure that an up-to-date copy of a variable is available to each processor when required. For instance, in a data processing system containing two processors each of which has a memory to which only it has direct access, a variable in the program which both processors use will require a copy of that variable to be stored in each memory. The coherency mechanism for ensuring that the copy of the variable used by each processor is always the most up-to-date one is often achieved by means of a direct memory access (DMA) unit. Ensuring that the DMA unit copies the correct variables in the correct direction (i.e. a valid copy overwrites an invalid copy) places a significant extra burden on the programmer of such systems and significantly increases the likelihood of errors.
An alternative way of implementing distributed memory systems is to provide each processor with a local cache and use a hardware coherence protocol to ensure that if two caches contain a copy of the same memory location, the copies are kept consistent. These coherence protocols often work by tracking whether a copy of a piece of memory is valid (contain a copy of the value most recently written to that memory location) and automatically perform a copy from valid copies to invalid copies either on demand (when a processor reads from a memory location and its local copy is currently invalid) or opportunistically (when a processor finds that it has an invalid copy of a memory location, it might perform an update in anticipation of that location being required in the future). These updates can either take place from a single statically designated “master copy” (e.g., a copy in main memory) or the current valid copy can be determined dynamically.
Cache coherence protocols can also be implemented in software. For example, instead of using the hardware to check that a memory location is valid before accessing it, a status value associated with the memory location can be tested and an appropriate copy performed (typically from a single master copy) to update the local copy. Alternatively, locking can be used to ensure that only one processor has a local copy at any time: a processor acquires the lock, copies the data from the master copy; uses/modifies the local copy; copies the local copy back to the master copy (if the local copy was modified); and releases the lock. Both approaches rely on dynamic checks to determine which copies are valid.
In network remote procedure call (RPC) systems, a variable is allocated in just one memory. When an operation on that variable is performed on a remote processor, a copy of the variable is sent to the remote processor, the operation is performed and, if necessary, the variable is copied back. Alternatively, the variable may be stored on the remote processor and temporary copies are made when other processors need to access it.